TVS501A Repeater Controller
       
       		A D D E N D A   for   Software Revision 24
       
       		   11/21/87
       
       	This document describes changes in software between Rev 24 and
       Rev 21. It also describes hardware changes from the schematic.
       
       (1) Watchdog reset is Faster (R23)
       
       	The watchdog reset occurs more often. The result is that the
       heartbeat light blinks several times per second instead of once per
       second.
       
       (2) Timer Enable to Output Zero option (R23)
       
       	In some cases, it is desirable to have a digital output
       reflect whether the timers are turned on. The option now exists
       to have Output 0 respond to timer status. With the option enabled,
       output 0 will be active with the timer enabled, and off when the
       timer is disabled. If the option is disabled, Output 0 behaves
       as documented.

       	Control Function 45 enables this option. Function 46 disables
       it.



	(3) Timers corrected so that zero setting works right (R24)

	(4) Option Provided to Disable LCOR detect:

	    77 - { Maint Mode Only } - Cause LCOR to prevent LPTT (this
		was normal operation through Rev 23)
	    78 - { Maint Mode Only } - { Default } - LCOR does not
	 	prevent LPTT

	(5) Option Provided to Completely Kill the Tail (R24)

	    75 - { Not User Mode } - Cause Transmitter to Drop as soon
		as COR goes away
 
	    76 - { Not User Mode } - Normal Tail Functionality
       
       (3) U1 should now be a 4069. Problems of third harmonic crystal operation
           were detected when U1 was changed to a 74HC04. It should now be
           changed back to a 4069 (or 74C04 - equiv)
       
       (4) U2 should now be a 74HC4040. The crystal frequency is too high for
           a conventional CMOS 4040 to operate reliably. Some problems occurred
           which resulted in failure of the DTMF decoder to operate at all.
       
       (5) U3 should be a conventional CMOS 4040. When we changed it to a
           74HC4040, there were infrequent and unexplained processor resets.
           Changing back to a CMOS4040 cured the problem.